1. Field of the Invention
The present invention relates to a network-connected information-processing apparatus capable of switching power modes, a packet processing method, and a computer program product.
2. Description of the Related Art
Recently, such a network system that a plurality of information-processing apparatuses, such as a computer and a printer, is connected to one another by, for example, an Ethernet (Registered Trademark) local area network (LAN) connection thereby enabling data transmission/reception among the information-processing apparatuses has been in widespread use. The information-processing apparatus typically includes a control processor equipped with a media access controller (MAC) and the like, and has a power-mode switching function. With the power-mode switching function, the information-processing apparatus can switch power modes. When predetermined conditions are met, the information-processing apparatus switches from a normal power mode to a power saving mode, for example, by shutting off a power supply to a part of the apparatus including the processor, thereby reducing power consumption.
However, in the conventional technology, such a typical information-processing apparatus can neither discard a predetermined packet received via the network nor transmit a response packet with respect to the received packet without intervention of a central processing unit (CPU) of the processor. Therefore, even when the information-processing apparatus is put into the power saving mode, for example, by switching the CPU to a sleep mode, the CPU needs to be switched back to a normal power mode every time the information-processing apparatus receives a packet. In other words, the CPU cannot be in a low power-consumption state for a long time. Thus, it is difficult for the conventional information-processing apparatus to reduce the power consumption effectively.
As one technique to cope with this problem, the CPU, the MAC, and a packet processing unit capable of processing a predetermined packet can be integrated into an application specific integrated circuit (ASIC). In this technique, while the information-processing apparatus is in the power saving mode, the packet processing unit can process a portion of a received packet without intervention of the CPU. However, in such an information-processing apparatus employing various types of processors to support various types of performances of the system, there is a disadvantage of a high development cost for the ASIC.
As another technique, a dedicated network controller for processing a received packet and the like can be provided to an external bus of the CPU, such as a peripheral components interconnect (PCI) bus. However, in this technique, it is necessary to provide functions irrelevant to network communications, such as a PCI bus function, to the information-processing apparatus additionally. Therefore, the MAC and a network processing function of the processor including the CPU are not utilized effectively. In addition, a cost of the entire apparatus disadvantageously increases.
It is common knowledge that as an operating frequency of the circuit gets lower, power consumption of the circuit gets smaller. With this knowledge, for example, Japanese Patent Application Laid-open No. 2007-148681 and Japanese Patent Application Laid-open No. 2004-362282 disclose an apparatus that switches power modes of which by changing a clock frequency to be supplied to a network-connected information-processing apparatus or the like thereby reducing power consumption of the apparatus.
However, in the technology disclosed in Japanese Patent Application Laid-open No. 2007-148681, a received packet is to be processed by a CPU. Therefore, in the same manner as described above, the CPU cannot be in a low power-consumption state for a long time. Thus, it is difficult to reduce the power consumption effectively.
Furthermore, in the technology disclosed in Japanese Patent Application Laid-open No. 2004-362282, it is necessary to provide a specific dedicated unit, for example, for controlling a network connection and for controlling a change in clock frequency while the apparatus is in the power saving mode to a circuit. Therefore, a configuration of the circuit becomes complicated, and thus a cost of the apparatus disadvantageously increases.